The present invention relates to an electrode contact section incorporated in a semiconductor device.
In the prior art, en electrode section incorporated in a semiconductor device is formed of an impurity layer provided in a semiconductor layer, and an electrode (made of, for example, a metal such as aluminum) that is in contact with the impurity layer. The impurity layer is often formed by ion implantation for the purpose of low cost.
In the electrode contact section, it is important to reduce the contact resistance of the electrode and the impurity layer. To reduce the contact resistance, the concentration of an impurity in the impurity layer is generally increased.
However, when forming an impurity layer by ion implantation, the concentration profile of the impurity layer shows a curved line with a peak. The impurity concentration of a surface portion of the semiconductor layer is lower than a peak concentration assumed at an inner portion thereof. In particular, in a longitudinal power device such as an IGBT, there is a case where a MOS structure is provided at one surface of a semiconductor layer, and an impurity layer is provided at the other surface thereof. In this case, the impurity layer at the other surface of the semiconductor layer cannot be annealed at a high temperature for a long time, with the result that the difference between the peak concentration and the surface concentration of the impurity layer is increased, and hence the contact resistance cannot sufficiently be reduced.
Further, in an IGBT (Insulated Gate Bipolar Transistor) as shown in FIG. 1, for example, it is necessary to reduce the contact resistance of an electrode contact section (a contact section between the impurity layer 2 and an anode layer 3), and also to quickly prevent carrier injection from an impurity layer (p+-type emitter layer) 2 to an n+-type base layer 1 when turning off the semiconductor device, in order to turn off the device at high speed.
However, to reduce the contact resistance at the electrode contact section, it is necessary to increase the impurity concentration of the impurity layer 2. On the other hand, to quickly turn off the semiconductor device, it is necessary to reduce the impurity concentration of the impurity layer 2, and also to make the impurity layer 2 shallow so as to reduce the coefficient of carrier injection from the impurity layer 2 to the n+-type base layer 1.
In other words, concerning the impurity concentration of the impurity layer 2 at the electrode contact section, a reduction of the contact resistance and an increase of the speed of the turn-off of the semiconductor device (i.e. a reduction of the carrier injection coefficient) is a tradeoff relationship. Accordingly, these two purposes cannot be satisfied simultaneously.